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Course
Pro-forma
Bachelor of Engineering (Electrical)
Code
KEEE4426
Title
VLSI
Pre-requisite
KEEE 2232
Student Learning Time (SLT)
120 hours
Credit
3
Learning Outcomes
1.
Apply mathematical methods and circuit analysis models in
analysis of CMOS digital electronics circuits, including logic
components and their interconnects.
2.
Apply CMOS technology-specific layout rules in the
placement and routing of transistors and interconnect, and
to verify the functionality, timing, power, and parasitic
effects.
3.
Complete a significant VLSI design project having a set of
objectives criteria and design constraints.
4.
Explain the CMOS fabrication process and its implications.
Synopsis
This course introduces students to the principles and design
techniques of very large scale integrated circuits (VLSI). Topics
include: MOS transistor characteristics, DC analysis, resistance,
capacitance models, transient analysis, propagation delay, pow
Assessment
40 % Continuous Assessments
60 % Final Examination
References
1.
Jan M. Rabaey, Anantha Chandrakasan, and Borivoje
Nikolic,Digital Integrated Circuits Design, Pearson Education,
Second Edition, 2003
2.
Weste, N.H.E. & Eshraghian, K. (1993). Principles of CMOS
VLSI Design: A Systems Perspective. Addison-Wesley (2nd
ed.).
3.
Wolf, W. (1994). Modern VLSI Design - A System Approach.
Prentice-Hall.
Soft Skills
Communication Skills (CS1, CS2, CS3)
Critical Thinking & Problem Solving (CT1, CT2, CT3)
Team Working Skills (TS1, TS2)
Lifelong Learning & Information Management (LL1, LL2)
Leadership Skills (LS1, LS2)